Trojan detection via delay measurements: An approach to select paths and vectors to maximize effectiveness and minimize cost

One of the growing issues in IC design is how to authenticate chips fabricated by untrusted vendors. Such authentication, often called Trojan detection, is challenging since the specifics of hardware Trojans inserted by intelligent adversaries are difficult to predict and most Trojans do not affect the logic behavior of the circuit unless they are activated. Also, Trojan detection via parametric measurements becomes increasingly difficult with increasing levels of process variations. In this paper we introduce the new notion of a set of surrogate Trojan targets, where the surrogates capture the necessary conditions that every Trojan must satisfy. We also propose a method that maximizes the resolution of each path delay measurement, in terms of its ability to detect the targeted surrogate. In particular, for each surrogate, our approach accentuates the surrogate’s impact by generating a vector that sensitizes the shortest path passing via the surrogate’s site. We estimate the minimum number of chips to which each vector must be applied to detect the surrogate with sufficient confidence for a given level of process variations. Finally, we demonstrate the significant improvements in effectiveness and cost provided by our approach under high process variations. Experimental results on several benchmark circuits show that we can achieve 3.48X reduction in test cost using our approach compared to classical path delay testing with Student’s t-test.